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介绍了一种应用于ＣＣＤ彩色摄像系统的视频锁相同步系统。基于锁相理论的视频锁相同步系统是一个二级锁相环路，包括同步信号发生电路和高频点像素时钟电路。并详细阐述了同步信号发生电路和高频点像素时钟电路的锁相原理及电路。高频点像素时钟电路的外分频电路是由现场可编程门阵列（ＦＰＧＡ）实现的，利用ＦＰＧＡ的现场可编程特性，可得到不同频率的高频点像素时钟。
A video lock-in synchronization system for CCD color camera system is introduced. Based on phase-locked loop theory of video lock-in synchronization system is a secondary phase-locked loop, including the synchronization signal generation circuit and high-frequency pixel clock circuit. And details the lock-in principle and circuit of the synchronous signal generation circuit and the high-frequency point pixel clock circuit. The external frequency dividing circuit of the high frequency point pixel clock circuit is realized by a field programmable gate array (FPGA). By utilizing the field programmable characteristic of the FPGA, high frequency point pixel clocks with different frequencies can be obtained.