论文部分内容阅读
讨论了一种面向SOC设计的基于指令级仿真器(ISS)的软硬件协同验证环境。在该环境中,硬件用硬件描述语言来建模,软件用编程语言来编写,使用指令集仿真器和事件驱动逻辑仿真器分别完成对软硬件的仿真,两个仿真过程使用不同的进程并行进行,并通过进程间通信(IPC)实现两个仿真器之间的信息交互。
A software and hardware co-verification environment based on instruction level simulator (ISS) for SOC design is discussed. In this environment, the hardware is modeled in a hardware description language, the software is written in a programming language, the instruction set simulator and the event driven logic simulator are used to complete the simulation of hardware and software, respectively, and the two simulation processes use different processes in parallel , And through the process of communication (IPC) to achieve the exchange of information between the two simulators.