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设计了一种采用前调整器的高电源抑制比的CMOS带隙基准电压源.基于CSMC 0.5μm标准CMOS工艺,分别对有前调整器与没有前调整器的CMOS带隙基准电压源进行了设计与仿真验证.仿真结果显示,采用前调整器的带隙基准在100 Hz、1 kHz、100 kHz处分别获得了-117.3 dB、-106.2 dB、-66.2 dB的高电源抑制比,而没有采用前调整器的CMOS带隙基准在100 Hz、1 kHz、100 kHz处仅分别获得了-81.8、-80.1、-44.9 dB的电源抑制比;在-15～90℃范围内,采用前调整器的带隙基准的温度系数为6.39 ppm/℃;当电源电压在2.2～8 V变化时,采用调整器的带隙基准的输出电压变化仅9.73μV.
A CMOS bandgap voltage reference with a high power rejection ratio using a pre-regulator was designed.A CMOS bandgap voltage reference with and without a pre-regulator was designed based on the CSMC 0.5μm standard CMOS technology Simulation results show that the bandgap reference with the pre-regulator achieves high power supply rejection ratios of -117.3 dB, -106.2 dB and -66.2 dB at 100 Hz, 1 kHz and 100 kHz respectively, The regulator’s CMOS bandgap reference achieves only -81.8, -80.1, and -44.9 dB power supply rejection ratios at 100 Hz, 1 kHz, and 100 kHz, respectively; with a pre-conditioner strap in the -15 to 90 ° C range The temperature coefficient of the slot base is 6.39 ppm / ° C; when the power supply voltage is changed from 2.2 to 8 V, the output voltage of the band gap based regulator is only 9.73 μV.