CH850是一种功能强、功耗低、定时精度高、定时可靠和应用方便的CMOS大规模集成电路。它主要是为机电行业定时装置而设计,但作为0—9999四位十进制数字定时器仍不失其通用性,可在各种技术领域广泛使用。一、结构 CH850包括分频器、主定时计数器、四位数字BCD码缓冲输出器、扫描显示位选控制信号发生器、位数字选择开关、笔划译码器和定时符合信号锁存器等部分,它的方框图如图1所示。基准频率信号f_r从脚19输入后,先经过施密特触发器整形,再由一个5分频器和两个10分频器进行分频。由于这些分频器是串联连接,因而可对f_r作5、50和500分频,产生的三种分基准频率信号分别从脚16-18输出,作为主定时计数器的定时计时时钟信号。图2为分频器输入时钟与输出信号的时间关系。图 CH850 is a powerful, low power consumption, timing accuracy, timing and reliable and easy to use CMOS LSI. It is mainly for the mechanical and electrical industry timing device designed, but as 0-9999 four decimal digital timer is still its versatility, can be widely used in various technical fields. First, the structure CH850 includes a divider, the main timing counter, four-digit BCD buffer output device, the scan display bit selection control signal generator, digital selector switch, stroke decoder and timing part of the signal latch, Its block diagram is shown in Figure 1. After the reference frequency signal f_r is input from pin 19, it is first shaped by Schmitt trigger and then divided by a 5-divider and two 10-divider. Since these dividers are connected in series, they can be divided by 5, 50, and 500 for f_r. The resulting three sub-reference frequency signals are output from pins 16-18, respectively, as the timing timing clock signal for the main timing counter. Figure 2 shows the timing relationship between the divider input clock and the output signal. Figure