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该文报道具有最小比导通电阻的~1.7 k V 4H-SiC结势垒肖特基二极管。首先通过数值仿真对结势垒肖特基(junction barrier Schottky,JBS)二极管的有源区和终端结构进行了优化设计。实验结果验证了场限环(floating guard ring,FGR)终端的优化设计结构具有较强的鲁棒性,能够抵抗工艺中环间距的变化以及钝化层中寄生电荷的影响。实验制作的4H-SiC结势垒肖特基二极管实现了2.5 mΩ·cm2的最小比导通电阻值,接近于理论值(2.4 mΩ·cm2),并且具有优秀的反向阻断特性,获得了最高1.75 k V的阻断电压(达到了95%的理论值)和83%的器件良率,从而实现了SiC JBS二极管品质因数的最高记录(U22B/Ron_sp=1 225 MW/cm)。
This paper reports a ~ 1.7 k V 4H-SiC junction-barrier Schottky diode with the smallest specific on-resistance. Firstly, the active region and the terminal structure of junction barrier Schottky (JBS) diode are optimized by numerical simulation. The experimental results verify that the optimal design structure of the floating gate ring (FGR) terminal is robust, able to resist the variation of the ring spacing in the process and the parasitic charge in the passivation layer. The fabricated 4H-SiC junction-barrier Schottky diode achieves a minimum on-resistance of 2.5 mΩ · cm2, which is close to the theoretical value (2.4 mΩ · cm2) and has excellent reverse blocking characteristics Up to 1.75 kV blocking voltage (up to 95% theoretical) and 83% device yield were achieved, resulting in the highest recorded quality factor for SiC JBS diodes (U22B / Ron_sp = 1,225 MW / cm).