基于TSMC 180nm CMOS工艺,设计了一种应用于GNSS接收机锁相环的快速自动频率控制电路。采用准闭环结构,并通过二分查找的方式寻找最优电容阵列控制字,缩短了频率粗调节时间,从而缩短了锁相环的锁定时间。仿真结果表明,当AFC电路工作时,PLL锁定时间为7μs,其中,频率粗调节时间约为4μs。 Based on the TSMC 180nm CMOS process, a fast automatic frequency control circuit for GNSS receiver PLL was designed. The quasi-closed-loop structure is adopted, and the optimal capacitor array control word is searched through binary search to shorten the frequency coarse adjustment time and shorten the lock time of the phase-locked loop. Simulation results show that, when the AFC circuit is working, the PLL lock time is 7μs, of which, the coarse frequency adjustment time is about 4μs.