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提出了一种符合ISO/IEC18000-6B标准的无源UHF RFID电子标签验证开发平台,其工作在915MHzISM频带下.该平台有效减少了设计开发时间及成本,并实现了电子标签的快速原型设计.该平台包括RFID模拟前端以及采用Altera ACEX FPGA实现的标签控制逻辑.RFID模拟前端采用Chartered 0.35μm2P4M CMOS工艺进行流片,包括本地振荡器、时钟产生电路、复位电路、匹配网络和反向散射电路、整流器、稳压器以及AM解调器等.通过调整FPGA中的标签控制逻辑,该平台实现了快速、灵活而高效的RFID验证开发.
A passive UHF RFID tag development platform based on ISO / IEC18000-6B is proposed, which operates under the 915MHzISM band, which effectively reduces design and development time and cost, and realizes the rapid prototyping of RFID tags. The platform includes an RFID analog front end and tag control logic implemented with Altera’s ACEX FPGA.The RFID analog front end uses a Chartered 0.35μm2P4M CMOS process for streamers including local oscillator, clock generation circuit, reset circuit, matching network and backscatter circuit, Rectifiers, regulators and AM demodulators, etc. The platform enables fast, flexible and efficient RFID verification development by adjusting the tag control logic in the FPGA.