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The CMOS transmission gate is a typical application of the passtransistor. Two transmission gates with complementary controls can form a1-of-2 multiplexer, as shown in Fig. 1 a. Two special cases are of interestif c_0=0 and c_1=y, the output is x.y, and if c_0=y and c_1=1, the output isx+y. The AND and OR gates arising from these cases are shown in Figs.1 b and 1 c. Where 0 or 1 is transmitted, the unnecessary PMOS or NMOStransistor in the pass path has been omitted. These gates save one MOStransistor in comparison with the traditional scheme of a NAND gate orNOR gate plus an inverter. The inputs are treated asymmetrically in thesegates, yielding an inverse output for one of the inputs. The symbols in Fig1 show the extra output and emphasize the asymmetry.
The CMOS transmission gate is a typical application of the passtransistor. Two transmission gates with complementary controls can form a1-of-2 multiplexer, as shown in Fig. 1 a. Two special cases are of interestif c_0 = 0 and c_1 = y, the The output is xy, and if c_0 = y and c_1 = 1, the output isx + y. The AND and OR gates arising from these cases are shown in Figs.1 b and 1 c. Where 0 or 1 is transmitted, the second PMOS or NMOStransistor in the pass path has been omitted. These gates save one MOS transistor in comparison with the traditional scheme of a NAND gate orNOR gate plus an inverter. The inputs are treated asymmetrically in thesegates, yielding an inverse output for one of the inputs. The symbols in Fig1 show the extra output and emphasize the asymmetry.