介绍一种采用数字错误校正技术的12位逐次近似型A/D转换器。校正算法可使转换速度提高近一倍而不会损失精度,也不需改用慢速的模拟电路设计。本文叙述一种新颖的逐次近似寄存器(Smart SAR)芯片设计,这种芯片是用双层多晶硅CMOS工艺制作的,面积为18k密耳~2。该芯片比采用同样摸拟芯片的A/D转换器大13％,但它是一种没有采用错误校正的常规数字芯片。采用数字错误校正后使速度从12微秒提高到了7微秒。 A 12-bit successive approximation type A / D converter using digital error correction technology is introduced. The correction algorithm can almost double the conversion speed without loss of accuracy or with slow analog circuit designs. This article describes a novel design of a Smart SAR chip that uses a double-layer polysilicon CMOS process and has an area of ​​18 km ~ 2. The chip is 13% larger than an A / D converter that uses the same analog chip, but it is a conventional digital chip that does not use error correction. Using digital error correction speeds up from 12 microseconds to 7 microseconds.