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基于TSMC 0.13μm CMOS工艺设计了一款适用于无线传感网络、工作频率为300~400 MHz的两级功率放大器。功率放大器驱动级采用共源共栅结构,输出级采用了3-stack FET结构,采用线性化技术改进传统偏置电路,提高了功率放大器线性度。电源电压为3.6 V,芯片面积为0.31 mm×0.35 mm。利用Cadence Spectre RF软件工具对所设计的功率放大器电路进行仿真,结果表明,工作频率为350 MHz时,功率放大器的饱和输出功率为24.2 d Bm,最大功率附加效率为52.5%,小信号增益达到38.15 d B。在300~400 MHz频带内功率放大器的饱和输出功率大于23.9 d Bm,1 d B压缩点输出功率大于22.9 d Bm,最大功率附加效率大于47%,小信号增益大于37 d B,增益平坦度小于±0.7 d B。
Based on the TSMC 0.13μm CMOS process, a two-stage power amplifier with a working frequency of 300-400 MHz is designed for wireless sensor networks. The power amplifier driver stage adopts a cascode structure, and the output stage adopts a 3-stack FET structure. The linearization technique is adopted to improve the traditional bias circuit and improve the linearity of the power amplifier. The supply voltage is 3.6 V and the chip area is 0.31 mm × 0.35 mm. The simulation of the designed power amplifier circuit using Cadence Specter RF software tools shows that the power amplifier has a saturated output power of 24.2 d Bm, a maximum power added efficiency of 52.5% and a small signal gain of 38.15 at 350 MHz d B. In the 300-400 MHz frequency band, the output power of the power amplifier is greater than 23.9 d Bm, the output power of the 1 d B compression point is greater than 22.9 d Bm, the maximum power additional efficiency is greater than 47%, the small signal gain is greater than 37 d B, the gain flatness is less than ± 0.7 d B.