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The planar edge termination techniques of junction termination extension (JTE) and offset field plates and field-limiting rings for the 4H-SiC P-i-N diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD10.0. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the reverse breakdown voltage for the 4H-SiC P-i-N diode with optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 × 10-5 A/cm2.
The planar edge termination techniques of junction termination extension (JTE) and offset field plates and field-limiting rings for the 4H-SiC PiN diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD 10.0. By experimental verification, The results show that the reverse breakdown voltage for the 4H-SiC PiN diode with optimized JTE edge termination can withstand the ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of the ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 × 10 -5 A / cm 2.