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引言 大规模集成电路和超大规模集成电路朝着高速度、高密度、低功耗的方向发展。自HMOS工艺技术出现之后,MOS工艺技术有了重大的改进和提高。总的趋势是沟道长度越来越短,栅氧化层厚度越来越薄,结深越来越浅。这对各工艺提出了越来越高的要求。Si/SiO_2界面特性不仅强烈地影响器件性能的稳定,而且对阈值电压的控制有很大的影响。因此,对薄栅
Introduction Large scale integrated circuits and very large scale integrated circuits are moving in the direction of high speed, high density and low power consumption. Since the advent of HMOS process technology, MOS process technology has been greatly improved and improved. The general trend is that the channel length is getting shorter and shorter, the gate oxide thickness is getting thinner and the junction depth is getting shallower and shallower. This puts forward higher and higher requirements for each process. The Si / SiO 2 interfacial properties not only strongly affect the stability of device performance, but also greatly affect the threshold voltage control. Therefore, the thin grid