目前基于HART总线的变送器多为两线制环路供电型,其要求整机的静态工作电流低于3.5mA,才能保证HART信号不受到影响。此电流的限制使得功耗较大的HART总线仪表难以采用通常的两线制HART接口。本设计中采用HART调制解调器AD5700和电流源DAC芯片AD5420实现了三线制HART接口,释放了3.5mA的功耗限制;并详细介绍了硬件和软件设计,成功实现了通信。 At present, HART-based transmitters are mostly two-wire loop-powered models, which require the machine’s quiescent operating current is less than 3.5mA, to ensure that the HART signal is not affected. This current limitation makes it difficult to use the usual two-wire HART interface with the more powerful HART bus instruments. In this design, a three-wire HART interface is implemented by using the HART modem AD5700 and the current source DAC chip AD5420, releasing the 3.5mA power consumption limit. The hardware and software design are introduced in detail, and the communication is successfully realized.