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得益于双重大马士革结构的尺寸不断缩小、低介电常数绝缘材料的引入和铜互连可靠性的提升,逻辑产品的互连技术不断向前发展。随着内存产品由铝工艺转向铜工艺,包括间隙填充在内的多项工艺也面临着更多的挑战。
Thanks to the ever-shrinking dual damascene structure, the introduction of low-k dielectric and the increased reliability of copper interconnects, interconnect technologies for logic products continue to evolve. As memory products shift from aluminum to copper processes, there are a number of additional challenges to the process, including gap filling.